Processor      Last updated on 2011/2555     12     10, a full moon day;

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^_ IFF base (CALCULATOR) 3_CRC Display。  

5W1H of Processor . hyper-v . Architecture;
5W1H of Processor . sparc . Architecture;
5W1H of Processor . Architecture . PPC . 601, 603, 604, ... ;
5W1H of Processor . Architecture . PPC . G3, 4, 5, ... ;
5W1H of Processor . Architecture . PPC . IBM iSeries;
5W1H of Processor . Architecture . PPC . IBM pSeries;
5W1H of Processor . Architecture . PPC . IBM RS / 6000;
5W1H of Processor . Architecture . Transmeta . Efficeon, ... ;
5W1H of Processor . Architecture . x86 . AMD Athlon, MP, XP, ... ;
5W1H of Processor . Architecture . x86 . AMD Duron;
5W1H of Processor . Architecture . x86 . AMD K6;
5W1H of Processor . Architecture . x86 . AMD Sempron;
5W1H of Processor . Architecture . x86 . Intel Celeron, D, ... ;
5W1H of Processor . Architecture . x86 . Intel Pentium 1, 2, 3, 4, ... ;
5W1H of Processor . Architecture . x86 . Intel Xeon 32bit;
5W1H of Processor . Architecture . x86-64 . AMD Athlon 64, X2, ... ;
5W1H of Processor . Architecture . x86-64 . AMD Opteron;
5W1H of Processor . Architecture . x86-64 . AMD Sempron 64;
5W1H of Processor . Architecture . x86-64 . AMD Turion 64;
5W1H of Processor . Architecture . x86-64 . Intel Pentium 4 Extreme;
5W1H of Processor . Architecture . x86-64 . Intel Pentium D;
5W1H of Processor . Architecture . x86-64 . Intel Xeon, MP, ... ;
 

Accumulator to Modulating controller to Multiplexer to Processor, a controller; Electronic engineering's product components with specific format, so called architecture, and each architecture provides detailed specification in assembly language; Till 2006, processor independent OSs [operating systems] have not engineered yet, because architectures' limitation, differences among architectural formats, net profit margin of marketing, and evolution of peripherals; also see: usamyanmar.net's numerological dimension ... ;

								AMD	,
processor	...	;

Cache . L1 Data, i.e. 64 KB; Cache . L1 Instruction, i.e. 128 KB; Cache . L2 Write back, 1 MB; Cache . L3 ... ;

Computer engineering engineers emphasis throughputs, and Input and / or Output for each pin;
Electronic engineering engineers emphasis sampling rates, and floating point processing speeds;
Material engineering engineers emphasis heat / thermal with size and weight;
Mathematicians and Scientists emphasis control flows and logic flows;
 

Cores per Processor = Number;

Develop ACT3 stage parallel time processor ... ;

Developing 3D GUI, to do so, dual core or 2 processors are needed, 2D must be fixed "not variable", processor should be redesigned to be not only blocks but also triangles ... ; also see: Lucky88...88;

IFF Monbusho level knowledge enhancement, IFF engineering 3D GUI, do not forget "transparency glasses" WHERE application's location, size, ... , but they are all blocks i.e. rectangular only, therefore, 1 hardware designer should decide whether rectangular with extended triangle, or triangle without rectangular, or dual core both, or ... ; to do so, 1st to define object name (transparency glass) ... ; 2nd to26 be25 glasses; 3rd to do software R&D method e.g. in95 Basic, Transparency Glasses As Object Name;

。

dual core (CISC OR RISC) MULTI... ;

A	R	M	;
B
C	I	S	C	,	complex	instruction	set	computing	;
(	S
ABC
)	C	P	U
...	(
	RISC	,	reduce	d	instruction		computing	;
	)
	...	;	cache	s	(	L	♯	)	;
device	;	power	;
E	C	C	,	error	correcting	code	;
S	o	C	,	system	s	on	chip	;
T	C	O	,	total	cost	66	owner	ship	;
X	Y	Z	(	XYZ	)	...	;

。

Geometrical process, a.k.a. Process-geometry, i.e. Fujitsu 90 n meter, ... ;

I / O bandwidth, i.e. 1.6 GB per second;

IFF computer () processor (Plastic Substrate Processor OR Silicon Processor) ... ; Organic Logic Devices;

In common, from pin number 1 to N number of pins for each processor provides functionalities of the processor, therefore, higher the pin number, more complexity regions exist in an engineering model; Basically, the usage "benchmarking" refers to "testing" of a processor, in common, throughputs, sampling rates, heat / thermal with size and weight, floating point processing speeds, Input and / or Output for each pin, and etc;

Integrated graphics interfaces, i.e. AGP 1x, 2x, 4x, ... ;

Intel

,

processor

...

;

logo; key;

MCU and DSP have been engineered for motors with control, because motors' sensor send feedback info to processor, power amp "converter" also send feedback info to processor, ... ;

Memory support, i.e. DDR SDRAM 333 +;

Multimedia instruction support, i.e. MMX, SSE, SSE3, ... ;

Numbers of instructions per one clock cycle, i.e. 8 instructions;

Operating noise, adjusting low dB in numerological dimension ... also see: aka.INF;

Operating pressure, i.e. 10 20 mb @ operating temperature;

Operating temperature, i.e. 0 °C ~ 100 °C, Sea-level product;

Plastic Substrate Processor, also see: http://www2.imec.be; Silicon Processor; Organic Logic Devices;

   。

						processor
processor
	processor
processor	aka	OO
IFF	base	(	CALCULATOR	)	101	OR		5

。  

Processor Category:

array processor; data processor; food processor; front end processor; front-end(processor) aka FEP; idea processor; language processor;  media processor; micro-processor aka MCU; print processor; processor board; processor bound; processor bus; processor card; processor handler; uni-processor; vector processor; word processor; word-processor ;

Silicon Processor, also see: http://www.intel.com; Plastic Substrate Processor; Organic Logic Devices;

Size, i.e. Number mm x Number mm; i.e. 0.4mm pitch with 555 pin grid array ... ;

swap;

システム(8; 16; 32; 64; 128; 256; ... ) using SEN OR MAN;

System bus speed, i.e. 400 + MHz;

wafer; duo-binary wafer;

Weight, i.e. 3 g @ 5 m;

WHEN an engineer needs a processor is WHEN 2 or more feedbacks exist to control a device, WHEN complexity regions are gathered for multiple processing e.g. while listening music, user may want to print, at the same time the user may want to browse Internet, a.k.a. 1 word "simultaneous", WHEN the most important time must be shared [HOW to share the most important time, also see: computers, satellite, server, ... ;

WHILE developing an algorithm, a mathematician does not care HOW to keep electro in WHICH solid stated material, vice versa, WHILE developing M Theoretical strings collision for each material, a material engineer does not care HOW to flow logic and WHICH computing numbers;

XP, Start >> Control Panel >> Performance and Maintenance >> System  check whether windows refreshing 2 times IFF EN language has been OS' default language, because e OR E context sensitive was compiled between cold boot and warm boot ... >> Hardware >> Device Manager >> Processors ... ;

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